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Over the years ASE Group has invested substantially
in research and development for these enabling technologies.
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The advanced manufacturing process
technologies we provide include fine pitch bonding,
flip chip, wafer bumping, 300 mm wafer bumping and
test, copper wafer process, chip scale package (CSP),
multi stack-die packaging, 3D packages and system in
package (SiP). Our fully-integrated 300 mm wafer backend
assembly and test capabilities are among the most advanced
in the world.
We also offer solutions covering opto-electronics
and blue-tooth technologies. Our advanced package
types, designed for high electronic performance and
superior heat dissipation, are used in high-end computing
applications such as microprocessors as well as communications
chips
and consumer products. Due to increasing environmental-protection
concerns, there is a growing demand for
lead-free packages and ASE has a large variety of lead-free
packages which comply with new global standards. |
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| ASE
Core Test Technology |
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| With leadership in test technologies
through a broad variety of test platforms, ASE Group
provides a complete range of semiconductor test services
to
our customers, including front-end engineering test;
wafer probing; final test of logic, mixed signal,
and memory semiconductors; and other test-related services
encompassing burn-in test, dry-pack, and tape and reel.
Our test services employ technology and expertise
and are the most advanced in the semiconductor industry. |
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In addition
to our huge capacity of test
equipment enabling quick ramp-up to our customers'
requirements, ASE is outstanding in multi-functional
test
with expertise in test platforms, program conversion and test program
development, empowering SoC/MCM/SiP testing technology to meet the increasing
need to pack more functions onto a single chip
or a package.
Our excellent
test capabilities in chipset, graphics, embedded
DRAM/MCM, CPU, RF, analog, analog to digital/digital
to analog, and digital signal processors makes ASE
an effective test solution provider, offering rapid
time to market and cost effective solutions. |
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| Technological
superiority |
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| ASE invests heavily in
research and development, and our large dedicated team
is one of the most talented in the industry. Over the
next few years, we will maintain our technological superiority
by constantly unveiling new packaging technologies,
which push the limits by offering more cost-effective
advanced solutions, such as wafer-level CSP, stacked-die
package, system in package
(SiP), 300mm wafer solution and flip-chip total solution. |
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| Technology Disclosures |
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With a perpetual drive for maintaining technical superiority, ASE has accumulated a strong knowledge base over the years. Listed below are some of the technology disclosures that contain concise descriptions of developments from research and development efforts of ASE's engineering staff:
2008:
• Lead Frame Delamination Improvement - No Ag Plating on Side Wall of LF
• Probe Bump Structure
• New Stacked-die Structure Development |
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