Dual-in-Line packages have been an industry standard for many years. The applications are common in consumer products, automotive devices, memory, analog ICs, and microcontrollers. These packages have evolved into a state-of-the-art technology owing to their robust reliability and great improvement on performance. Using PTH (plated through hole) and SMT (surface mount technology) assembly, dual-in-line packages provide an assortment of packaging capabilities, especially in low pin count devices at competitive manufacturing costs.
Features
Pkg Type
PDIP/Skinny PDIP/SDIP
SOJ
SOP
SSOP
TSOP(I)
TSOP(II)
(1mm=39.37mil; 1mil=25.4um)
*
The width of PDIP is the distance from shoulder-to-shoulder.
**
The overall thickness is the sum of body and stand-off, exclusive of PDIP. In the case of PDIP, the value is the thickness of body.
Reliability
Test Plan
All the dual-in-line packages selected for temperature/humidity test and temperature cycles are subject to precondition process per JEDEC moisture LEVEL3 prior to environmental stress. The test criterion is zero defects out of 45 sampling units.
