PDIP
SOP/SSOP
TSOP(I) / TSOP(II)
SOJ

Product Overview

Dual-In-line packages have been an industry standard for a long time. The applications are common in consumer products, automotive devices, memory, analog ICs, and microcontrollers. These packages have evolved into a state-of-the-art technology owing to their robust reliability and great improvement on performance. Using PTH (plated through hole) and SMT (surface mount technology) assembly, dual-in-line packages provide an assortment of packaging capabilities, especially in low pin count devices at competitive manufacturing costs.

All the dual-in-line packages selected for temperature/humidity test and temperature cycles are subject to precondition process per JEDEC moisture LEVEL3 prior to environmental stress. The test criterion is zero defect out of 45 sampling units. Temp/Humidity Test 85°C/ 85% RH, 1000 hr (JEDEC 22- A101) Pressure Cooker Test 121°C/ 100% RH/ 15 PSIG, 300 hr (JEDEC 22- A102) Temp Cyclic Test -65 ~ 150°C, 1000 CYCLES (MIL-STD-883-1010.7) High Temp Storage Test 150°C, 1000 hr (JEDEC 22- A103) High Accelerated Stress Test 130°C/ 85% RH/ 33.5 PSIA, 100 hr (JEDEC 22- A110)