Stacked die package is typical and major running type of SiP product. Stacked die package adopts vertical stacking between die to die for combining several devices into single package form factor. It can significantly improve electrical performance by sorting the signal communication path between the devices and reducing system level size by performing subsystem function from the PCB board to the package. The stacked methodology included Wire Bond, Spacer, Die overhang and Flip Chip technology to achieve flexible design & structure.

Stacked Package is KGD package solution including PiP (package in package) and PoP (package on package). The Stacked package adopts 3D idea. Each package is individually assembled and tested before integrated. This is also solution to improve package burn in test yield performance.