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Overview |
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Wafer bumping is an essence element of flip chip or board level semiconductor packaging. Bumping is an advanced wafer level process technology where “bumps” or “balls” made of solder are formed on the whole wafer form before the wafer is diced into individual chips. Those “bumps”, which can be composed by eutectic, lead free, or high lead material, on wafer are the fundamental interconnect components that will interconnect the die and the substrate together into a single package.
These bumps not only provide a connected path between die and substrate, but also play an important role in the electrical, mechanical, and thermal performance in the flipchip package. Flip chip assembly packages has traditionally been used for high-end niche applications. Recent technology development have adopted this process to be widely used in today’s consumer electronics applications. For the performance driven market, flip chip interconnection reduces signal propagation delay, provides much better bandwidth, and relieves the constraints of power and ground distribution. For the form factor driven market, such as mobile applications, replacing wirebonding by flip chip interconnects reduces the size and weight of the package.
As the world leading IC assembly subcontractor, ASE established its wafer bumping services in 1999. Licensed from Flip Chip International, the world’s leader in printing bumping technologies, ASE’s flip chip bumping process has proven to be robust and reliable. With production experience accumulated since 2000, ASE was the very first subcontractor to provide large volume production in bumping services. |
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| ASE's
Wafer Bumping Capabilities |
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Currently, ASE operates two state-of-the-art bumping facilities with a variety of bumping processes available, one is for 150mm and 200mm wafers, one is for 300mm wafers and both facilities are, both located in Kaohsiung, Taiwan. During the first quarter of 2000, ASE’s 200mm printing bumping process successfully passed the internal package reliability test. The bumping process was later qualified by customers and volume production began in the third quarter of 2000. The 300mm printing line was established in 2002, and production began in the third quarter of 2002. To date, more than 700K wafers from over 85 customers’ have been processed in ASE’s printing bumping facilities with output consistently over 30K wafers per month.
As a leading of bumping process provider, ASE began to develop and construct its own plating line in the second half of 2002. The internal qualification of 200mm plating process was passed in the frist quarter of 2003, and the 300mm plating process was qualified in the fourth quarter of the same year. The plating lines have been processing customer wafers in engineering mode and have been in production mode since the second quarter of 2004.
ASE was the first independent assembly company to offer bumping process for all wafer sizes both in solder printing and plating technology. |
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Features |
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Standard Bumping service ( flex on chip)
Repassivation
Redistribution
Wafer level SCP (Ultra CSP®)
Ultra CSP® is a registered trademark of Kulicke and Soffa Flip Chip Division |
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| Product
Offering |
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Reliability |
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| Test |
| Temperature Cycling Test |
| HAST |
| Temperature Humidity |
| High Temperature Storage |
| Precondition |
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ASE Qualified
Bumping Processes |
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Eutectic solder bumping |
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Low alpha, ultra low alpha eutectic solder bumping |
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3. Leadfree (Sn/Ag/Cu), solder printing bumping |
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Cu wafer (Cu pad) bumping |
| 5. Repassivation ( BCB or Polyimide ) solder bumping |
| 6. Redistribution layer (RDL using BCB or Polyimide) for Wafer Level CSP/Ultra CSP® |
| 7. Eutectic ultra low alpha solder plating bumping |
| 8. 95 Pb/ 5 Sn ultra low alpha solder plating bumping |
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Packing
& Shipping |
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1. Wafer cassette (Bumping standard) |
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Chip tray/Waffle pack (WLCSP/Ultra CSP®) |
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Tape & reel (WLCSP/Ultra CSP®) |
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| Advanced
Bumping Technologies under Development |
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| ASE continues to invest in advanced technologies to maximize solutions for customers' sophisticated chip designs. We are currently working with major IDMs and the world’s top foundries on polyimide repassivation and RDL, Cu pillar, and 90nm cu low-K wafer bumping. Combined with other ASE manufacturing services including substrate design, substrate manufacturing, wafer sorting, bumping, backside grinding, backside marking, flip chip assembly, final test, and drop ship, ASE offers customers a complete flip chip turnkey solution. |
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