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  • Overview

    Dual-in-Line packages have been an industry standard for many years. The applications are common in consumer products, automotive devices, memory, analog ICs, and microcontrollers. These packages have evolved into a state-of-the-art technology owing to their robust reliability and great improvement on performance. Using PTH (plated through hole) and SMT (surface mount technology) assembly, dual-in-line packages provide an assortment of packaging capabilities, especially in low pin count devices at competitive manufacturing costs.

    Features

    Dual-in-Line packages have been an industry standard for many years. The applications are common in consumer products, automotive devices, memory, analog ICs, and microcontrollers. These packages have evolved into a state-of-the-art technology owing to their robust reliability and great improvement on performance. Using PTH (plated through hole) and SMT (surface mount technology) assembly, dual-in-line packages provide an assortment of packaging capabilities, especially in low pin count devices at competitive manufacturing costs.
    Pkg Type Lead Count Available Lead Frame Material Body Width
    (mm)
    Overall Thickness** (mm) Second-level Interconnection Lead Pitch (mm)
    PDIP/Skinny PDIP/SDIP 8~64 Cu 7.62/10.16/17.78* 3.30~3.80 Lead (Via PTH) 1.78/2.54
    SOJ 28~44 Cu/A42 7.62/10.16 3.18~3.51 Lead (Via SMT) 1.270
    SOP 8~32 Cu 3.81/8.38/11.43 1.55~2.84 Lead (Via SMT) 1.270
    SSOP 48/56 Cu 7.62 2.69 Lead (Via SMT) 0.635
    TSOP(I) 28~48 Cu/A42 - 1.10 Lead (Via SMT) 0.50/0.55
    TSOP(II) 20~54 A42 7.62/10.16 1.10 Lead (Via SMT) 0.80/1.27
    (1mm=39.37mil; 1mil=25.4um)
    * The width of PDIP is the distance from shoulder-to-shoulder.
    ** The overall thickness is the sum of body and stand-off, exclusive of PDIP. In the case of PDIP, the value is the thickness of body.

    Reliability Test Plan

    All the dual-in-line packages selected for temperature/humidity test and temperature cycles are subject to precondition process per JEDEC moisture LEVEL3 prior to environmental stress. The test criterion is zero defects out of 45 sampling units.
    Temp/Humidity test 85°C/85% RH, 1000 hr. (JEDEC 22-A101)
    Pressure cooker test 121°C/100% RH/15 PSIG, 300 hr (JEDEC 22-A102)
    Temp cyclic test -65°C~150°C, 1000 CYCLES (MIL-STD-883-1010.7)
    High temp storage test 150°C, 1000 hr. (JEDEC 22-A103)
    High accelerated stress test 130°C/85% RH/33.5 PSIA, 100 hr. (JEDEC 22-A110)