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    CSP (chip scale package or chip size package) is a package that has an area of not more than 120% of the die. It is suitable for compact 2nd-level packaging efficiency. With better protection by ruggedized encapsulation and better 2nd-level reliability (or board level reliability), CSP prevails over the direct chip attach (DCA) and chip on board (COB) technology. This package makes the IC sturdy enough for easier handling, and testability. Providing low-cost test and burn-in, CSP is a substitute for known good die (KGD) with comparable electrical performance. In addition to required signal and power transmission contacts, some CSPs provide a direct thermal path for heat removal from the chip. The applications of CSP include memory ICs, RFICs, and communication ICs.

    CSP Offerimgs

    Leadless – QFN
    Quad Flat No-lead (QFN) or microchip carrier (MCC) uses half-encapsulation technology to expose the rear side of the die pad and the tiny fingers, which are used to connect the chip and bonding wire with the PCB. QFN packages are suitable for applications of over 12GHz working frequency. Providing both thermal and electrical enhancement, QFN is a cost-effective packaging solution due to its economical materials and simpler packaging process.

    Leadless – LGA
    LGA (Land Grid Array), an offshoot of BGA without solder balls, is another leadless package. LGA has the advantage of flexible routing to implement both electrical and thermal enhancement (for more product data, please refer to Leadless Package).

    Leadless – aQFN™
    Advanced Quad Flat No-lead. aQFN™ is solution for Lead less, multi-rows and fine pitch lead frame package with enhanced Thermal/ Electrical performance. aQFN™ is a cost-effective packaging solution due to its economical materials and simpler packaging process. Mainly applications same as QFN for Telecommunication, portable and consumer products.

    FBGAs
    Low & Thin BGAs (L(F)BGA, T(F) BGA, V(F)BGA, W(F)BGA, U(F)BGA) are the fine ball pitch (as small as 0.4mm) and thin profile ( thinner than 1mm) types of BGA as defined by JEDEC. These packages are capable of customized design, and therefore can be fabricated to near chip size. L(F)BGA is applicable to 3D MCM (also known as Stacked CSP). It can stack the chips nearly twice the size as the package. SCSP is suitable for the integration of hybrid memory ICs (for more product data, please refer to BGA, MCM, & SCSP).

    aCSP™
    ASE enhanced structures by providing for advance CSP, “aCSP™”, using polyimide, PBO, or thicker Cu RDL to meet various customer demands. aCSP™ is a wafer level CSP package that can be Direct Chip Attached to the PCB board without any interposer. It appears mainly in analog devices, microcontrollers, integrated passives, EEPROM, power and voltage regulator, power amplifier and RF devices. End application product will be used in cell phone, PDA and system board.

    FCCSP/Stacked CSP
    Please refer to Flip Chip CSP and Stacked CSP.

    Features

    Pkg Type Lead Count Available First-level Interconnection Second-level Interconnection Lead/Ball Pitch Overall Thickness (mm) Remark
    Leadless QFN 12~ 64 Wire bonding Terminal 0.5/0.65 0.9 Thermally enhanced
    LGA 32~ 52 Wire bonding Terminal 0.4/0.5/0.65 0.5~0.9 -
    aQFN 40~400 Wire bonding Terminal 0.4/0.5/0.65/0.8 0.6~0.85 Low-cost thermally enhanced
    aCSP 8~100 Bumping / Ball drop - 0.4/0.5/0.65/0.75/0.8 0.5~1 Wafer level package
    FBGA
    Pkg Type Lead Count Available First-level Interconnection Second-level Interconnection Lead/Ball Pitch Overall Thickness (mm)
    L(F)BGA 36~676 Wire bonding Solder ball 0.8/1 1.40~1.70
    T(F)BGA Wire bonding Solder ball 0.5/0.65/0.75/0.8/1 1.20~1.40
    V(F)BGA Wire bonding Solder ball 0.4/0.5/0.65/0.75/0.8 0.80~1.00
    W(F)BGA Wire bonding Solder ball 0.4/0.5/0.65/0.75/0.8 0.65~0.80
    U(F)BGA Wire bonding Solder ball 0.4/0.5/0.65/0.75/0.8 0.50~0.65