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  • Overview

    PiP (Package-in-Package) is an option which can be used to decouple the stacking design from die design or when KGD (known good die) is not available. PiP can provide excellent electrical performance for memory bus and integration at assembly. PiP provides a smaller form factor compared with PoP.


    PiP offers excellent advantages for many applications where size, weight, electrical performance and board density are important considerations. The KGD solution for memory package (internal) can provide high FT yield performance after burn-in.

    The outline of PiP is same as single package. There is no additional process needed with FT and SMT at end customer.

    PiP is suitable for applications such as Cellular phone, Wireless LAN, PDA and various handheld electronics.


    Package stacking
    Mold CPD to Mold CPD adhesion
    WB type PiP, FC+WB PiP
    KGD solution
    Green Package solution available
    High speed performance
    Good Electrical performance
    Different devices integrated onto one package


    Package Level
    MSL JEDEC Level 3, 30°C/ 60% RH 192 hours
    TCT –65°C ~ 150°C 1000 cycles
    HAST 130°C/ 85% RH/33.5 PSIG 96 hours
    HTST 150°C 1000 cycles
    Board Level
    TCT 0~100°C, 2 CPH W/10 minute ramps and 5 minute duells respectively 1000 cycles
    THT 85°C/ 85% RH 1000 hours